![]() ![]() Topology of the EtherCAT system with DC-capable devices). The synchronization process and the method of communication of EtherCAT dictate that the first DC-capable slave in the system represents the reference clock ("M" in Fig. One device is the reference clock, all other DC-capable devices are continuously synchronized with an accuracy of generally less than 100 ns. Mixed operation in the EtherCAT system is possible, so long as the EtherCAT master supports DC. An EtherCAT slave may support DC, but does not have to. These local clocks can be used for synchronous outputs or data acquisition (e.g. If an EtherCAT slave supports distributed clocks (DC), its ESC (EtherCAT slave controller) contains a hardware-based clock (usually 64 bit, in rarer cases 32 bit) with a resolution of 1 bit = 1 ns. ![]() The distributed clock technology in the EtherCAT system enables synchronized operation of local clocks in all EtherCAT devices (master and slaves). ![]()
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